Call for TTEP 2015 Tutorial Proposals
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TTEP 2015

IEEE Test Technology Educational Program 2015

http://ttep.tttc-events.org/ttep/index.html

Call for DATE, LATS, VTS, ITC, and ATS Tutorial Proposals 2015

EXTENDED DEADLINE!
September 24, 2014

Overview


The Tutorials & Education Group (TEG) of the IEEE Computer Society Test Technology Technical Council (TTTC) organizes in 2015 a comprehensive set of Test Technology Tutorials to be held in conjunction with TTTC sponsored technical meetings. The objective of this common call is to invite submissions for tutorial proposals in order to enable selecting the best fitted tutorials for each technical meeting, as part of the annual Test Technology Educational Program (TTEP).

The tutorials accepted by the Program Committee will be included in the Test Technology Educational Program, the intent of which is to serve the test and design professionals offering fundamental education and expert knowledge in state-of-the-art test technology topics.


The TTEP 2015 tutorials program includes (but is not limited to) the following technical meetings:

  • Design Automation and Test in Europe (DATE�15)
  • Latin American Test Symposium (LATS�15)
  • VLSI Test Symposium (VTS�15)
  • International Test Conference (ITC�15)
  • Asian Test Symposium (ATS�15)

TTEP accommodates a wide range of technical areas, from mature test topics of high interest to industrial test engineers to emerging test topics with emphasis on novelty. TTEP is soliciting new and updated tutorial proposals, as well as proposals for Test Clinics, which are particularly geared towards newcomers to the area of test, such as new test engineers and students pursuing graduate studies in test, with an objective of offering a broad yet comprehensive review of basic test topics in an accessible way to the lay audience. The topics of interest for year 2015 TTEP Tutorials include (but are not limited to):

  • 3D chip testing
  • Automatic test equipment
  • Board-level testing
  • Built-In Self-Test
  • Defect oriented testing
  • Design for testability
  • DFT testers
  • Diagnosis and debug
  • Embedded core testing
  • Failure analysis techniques
  • Hardware Security
  • High-speed interface testing
  • Interconnect characterization
  • Memory testing
  • Mixed-Signal/Analog testing
  • Nanometer tech testing
  • On-line and field testing
  • Performance/Delay testing
  • Microprocessor testing
  • Power issues in testing
  • Reliability and Safety
  • System-level testing
  • Test data mining
  • Test economics
  • Test synthesis
  • Test resource partitioning
  • Test related standards
  • Verification and Validation
  • Wafer testing
  • Yield optimization and test

Author Information

All tutorial proposal submissions to TTEP 2015 are to be made electronically (in PDF format using the TTEP tutorial proposal template provided on both the TTEP main web site and the submission website) through the TTEP submissions website:


NEW DEADLINE for tutorials proposals:

September 24, 2014: NEW extended deadline for tutorial proposals for:

DATE�15
, LATS�15, VTS�15, ITC�15, and ATS�15.

Notification of acceptance dates:
November 7, 2014: Notification of acceptance for DATE�15
December 19, 2014: Notification of acceptance for VTS�15, LATS�15
June 5, 2015: Notification of acceptance for ITC�15
August 7, 2015: Notification of acceptance for ATS�15


Contact Information

Paolo Bernardi

TTEP Vice Chair (Program)
Politecnico di Torino, I
Tel.: +39 011 564 7183
Fax: +39 011 564 7099
Committee

VICE CHAIR (PROGRAM)

  • P. BERNARDI � Politecnico di Torino

PAST CHAIR

  • D. GIZOPOULOS � University of Athens

FINANCE CHAIR

  • C.-H. CHIANG � Alcatel-Lucent

PUBLICITY CHAIRS

  • G. DI NATALE � LIRMM
  • E. SANCHEZ � Politecnico di Torino

PLANNING CHAIR

  • Y. ZORIAN � Synopsis

INDUSTRIAL RELATIONS CHAIR

  • R. GALIVANCHE � INTEL Corporation

AUDIO/VISUAL CHAIRS

  • S. MENON � INTEL Corporation
  • O. SINANOGLY � NYU in Abu-Dhabi

ELECTRONIC MEDIA CHAIRS

  • S. DI CARLO � Politecnico di Torino
  • A. BOSIO � LIRMM 

ORGANIZING LIASONS

  • F. FUMMI � DATE'14
  • D. GIZOPOULOS � LATW'14
  • S. RAVI � VTS'14
  • Y. ZORIAN � ITC'14
  • Y. ZHANG � ATS'14

PROGRAM COMMITTEE
  • Robert C. Aitken � ARM, USA
  • Davide Appello � STMicroelectronics, I
  • Kanad Chakraborty � Lattice Semiconductor, USA
  • Sreejit Chakravarty � LSI logic, USA
  • Kun Young Chung � Samsung, USA
  • Scott Davidson � Oracle, USA
  • Anne E. Gattiker � IBM, USA
  • Kazumi Hatayama � NAIST, J
  • Doug Josephson � Intel Corporation, USA
  • Hans Manhaeve � Qstar, B
  • Amit Majumdar � Xilinx, USA
  • Erik Jan Marinissen � IMEC, B
  • Stephen Sunter � Mentor, USA
  • Baosheng Wang � AMD, USA
For more information, visit us on the web at: http://ttep.tttc-events.org/ttep/index.html

The Test Technology Educational Program 2015 is sponsored by the Institute of Electrical and Electronics Engineers (IEEE) Computer Society's Test Technology Technical Council (TTTC).


IEEE Computer Society- Test Technology Technical Council

TTTC CHAIR 
Michael NICOLAIDIS 
TIMA Laboratory - France 
Tel. +33-4-765-74696 
E-mail michael.nicolaidis@imag.fr

PAST CHAIR 
Adit D. SINGH 
Auburn University - USA 
Tel. +1-334-844-1847 
E-mail adsingh@eng.auburn.edu

TTTC 1ST VICE CHAIR 
Chen-Huan CHIANG
Alcatel-Lucent - USA
E-mail chen-huan.chiang@alcatel-lucent.com

SECRETARY
Joan FIGUERAS
Un. Politec. de Catalunya - Spain
Tel. +34-93-401-6603
E-mail figueras@eel.upc.es

ITC GENERAL CHAIR 
Michael Purtell
Intersil 
- USA 
Tel. +1-408-372-6015 
E-mail m.purtell@ieee.org

TEST WEEK COORDINATOR
Yervant ZORIAN 
Synopsys, Inc. USA 
Tel. +1-650-584-7120 
E-mail Yervant.Zorian@synopsys.com

TUTORIALS AND EDUCATION
Paolo BERNARDI
 
Politecnico di Torino
 - Italy
Tel. +39-011-564-7183
E-mail paolo.bernardi@polito.it

STANDARDS
Rohit KAPUR

Synopsys
, Inc. - USA
Tel. +1-650-934-1487
E-mail rkapur@synopsys.com

EUROPE
Giorgio DI NATALE
LIRMM - France
Tel. +33-467-41-85-01
E-mail giorgio.dinatale@lirmm.fr

MIDDLE EAST & AFRICA
Ibrahim HAJJ
American University of Beirut - Lebanon
Tel. +961-1-341-952
E-mail ihajj@aub.edu.lb

STANDING COMMITTEES 
Andr� IVANOV 
University of British Columbia - Canada 
Tel. +1-604-822-6936 
E-mail ivanov@ece.ubc.ca

ELECTRONIC MEDIA 
Giorgio DI NATALE
LIRMM - France
Tel. +33-467-41-85-01
E-mail giorgio.dinatale@lirmm.fr

 

PRESIDENT OF BOARD 
Yervant ZORIAN
Synopsys, Inc. USA 
Tel. +1-650-584-7120 
E-mail Yervant.Zorian@synopsys.com

SENIOR PAST CHAIR 
Andr� IVANOV 
University of British Columbia - Canada 
Tel. +1-604-822-6936 
E-mail ivanov@ece.ubc.ca

TTTC 2ND VICE CHAIR 
Rohit KAPUR
 
Synopsys, Inc. 
USA
Tel. +1-650-934-1487
E-mail rkapur@synopsys.com

FINANCE 
Chen-Huan CHIANG
Alcatel-Lucent - USA
E-mail chen-huan.chiang@alcatel-lucent.com

IEEE DESIGN & TEST EIC 
Andr� IVANOV
U. of British Columbia Canada 
Tel. +1 
E-mail ivanov@ece.ubc.ca

TECHNICAL MEETINGS 
Chen-Huan CHIANG 
Alcatel-Lucent
 - USA
Tel. +1-973-386-6759
E-mail chenhuan@alcatel-lucent.com

TECHNICAL ACTIVITIES 
Matteo SONZA REORDA
Politecnico di Torino Italy
Tel.+39 090 7055
E-mail patrick.girard@lirmm.fr

ASIA & PACIFIC 
Kazumi HATAYAMA
NAIST - Japan
Tel.+81-743-72-5221 
E-mail k-hatayama@is.naist.jp

LATIN AMERICA 
Victor Hugo CHAMPAC
Instituto Nacional de Astrofisica - Mexico
Tel.+52-22-470-517
E-mail champac@inaoep.mx

NORTH AMERICA 
Andr� IVANOV 
University of British Columbia - Canada 
Tel. +1-604-822-6936 
E-mail ivanov@ece.ubc.ca

COMMUNICATIONS
Cecilia METRA 
Universit� di Bologna - Italy
Tel. +39-051-209-3038 
E-mail cmetra@deis.unibo.it

INDUSTRY ADVISORY BOARD
Yervant ZORIAN
Synopsys, Inc. USA 
Tel. +1-650-584-7120 
E-mail Yervant.Zorian@synopsys.com